Jetson Orin Nano Power Consumption: Real-World Benchmarks (2026)

Last updated: March 2026

Idle and Baseline Power Consumption

With JetPack loaded, background services running, and no active inference pipeline, the Orin Nano draws approximately 5W. This baseline reflects the 8-core ARM Cortex-A78AE CPU at low utilization, the LPDDR5 memory controller maintaining refresh cycles, and the integrated GPU in a low-power clock state.

The 5W idle floor is meaningful for always-on deployments: a device waiting for a trigger event—motion detection, a wake word, or a network request—spends most of its operational life near this figure. Power-gating unused subsystems via nvpmodel can push idle draw below 5W, though this introduces latency when waking the GPU from a deeper sleep state.

Baseline power climbs to 8–12W once an inference pipeline is initialized and running continuously. The delta between idle and active inference is largely attributable to GPU clock ramp-up and increased LPDDR5 memory traffic as model weights are streamed from DRAM.

Inference Workload Power Profiles

Power consumption during inference is not a fixed number—it varies significantly with model architecture, input resolution, batch size, and numerical precision. The table below summarizes measured ranges across representative workloads.

The 25W peak occurs only under contrived maximum-throughput conditions—running multiple concurrent streams at full FP32 precision with no frame drops. Most production inference pipelines operate between 8W and 15W, which aligns with the 15W nominal TDP.

Memory bandwidth is a significant contributor. The LPDDR5 interface provides 102 GB/s, and saturating that bus—common when loading large model weights repeatedly—accounts for 40–50% of total system power. The GPU itself consumes the remaining 50–60%, making memory-efficient model architectures a direct power optimization lever.

Thermal and Power Management Strategies

Thermal throttling engages when the SoC junction temperature exceeds 80°C. At that point, the firmware reduces GPU and CPU clock frequencies automatically, which lowers power but also reduces throughput. In a poorly cooled enclosure, this creates a feedback loop: the workload slows, heat dissipates slightly, clocks recover, heat rises again—producing unstable latency rather than a clean thermal steady state.

For workloads averaging under 10W, a passive aluminum heatsink with adequate airflow through the enclosure is generally sufficient. Sustained workloads above 15W benefit from a small axial fan (25–40mm) directed across the heatsink fins. Active cooling adds minimal system cost while preserving full clock headroom.

Dynamic Voltage and Frequency Scaling (DVFS) is the primary software tool for managing the power-performance trade-off. Dropping the GPU clock from 1.0 GHz to 500 MHz reduces power consumption by 30–40%. The relationship is approximately cubic with frequency (power ∝ f³ at constant voltage), though voltage scaling on this platform is constrained by the operating voltage range of the SoC's memory subsystem. In practice, the effective power reduction from halving the clock is closer to 30–40% rather than the theoretical 87.5%, because static power and memory controller power remain relatively constant.

NVIDIA's nvpmodel tool exposes predefined power modes (5W, 10W, 15W) that adjust CPU core count, CPU frequency caps, and GPU frequency caps simultaneously. These modes are the fastest path to enforcing a power envelope without manual frequency tuning.

Real-World Deployment Power Scenarios

Battery-powered deployments require translating watt figures into runtime estimates. A 10 Wh cell at 10W average draw yields 50–100 minutes of operation, depending on the efficiency of the DC-DC converter and the actual load variability. Scaling to a 20–30 Wh battery—common in ruggedized handhelds and inspection drones—extends runtime to 2–5 hours. For PoE-powered camera deployments, see the PoE Power Budget Calculator for sizing multi-camera systems.

The runtime figures above assume ~85% converter efficiency and exclude peripheral power (cameras, radios, displays). USB cameras add 0.5–2W; cellular modems add 1–3W under active transmission. System-level power budgeting must account for these loads, not just the SoC.

For grid-connected deployments—fixed cameras, industrial inspection stations, smart kiosks—power consumption is less critical than thermal management. Here, the concern shifts to ensuring the enclosure can dissipate sustained 15W without exceeding ambient temperature limits in outdoor or high-temperature industrial environments.

Power Efficiency Metrics and Comparisons

Raw power figures mean little without throughput context. The Orin Nano delivers 15–25 TOPS depending on precision, translating to 15–25 TFLOPS/W at INT8—a meaningful improvement over its predecessors at equivalent task throughput.

The Orin Nano's advantage over the legacy Nano is architectural: the Ampere GPU supports structured sparsity and INT8 acceleration natively, enabling higher effective throughput at the same or lower power. Compared to the Xavier NX, the Orin Nano trades peak throughput for a lower power floor, making it the better choice when the workload fits within its compute envelope and battery life is a constraint. See Jetson Orin Nano vs Orin NX for a detailed comparison of compute capacity, memory, and deployment fit.

Optimization Techniques for Extended Runtime

Several techniques compound to meaningfully extend runtime without degrading inference quality:

INT8 Quantization via TensorRT

Converting FP32 models to INT8 using TensorRT's calibration pipeline reduces memory bandwidth demand and GPU compute cycles. In practice, this cuts inference power by 20–30% with accuracy degradation typically under 1% on standard classification benchmarks. For detection models, per-layer sensitivity analysis during calibration prevents accuracy collapse on precision-sensitive output heads.

Selective Pipeline Gating

Running inference only when input data changes—rather than on every frame—is the highest-leverage optimization for camera-based workloads. A frame differencing pre-filter running on the CPU at <0.5W can gate GPU inference, reducing effective average GPU utilization from 100% to 20–40% in low-activity scenes.

nvpmodel Power Modes

Locking the device to the 10W power mode via sudo nvpmodel -m 2 caps both CPU and GPU frequencies, enforcing a predictable power envelope. Combined with jetson_clocks --restore to reset on reboot, this provides a stable baseline for battery runtime estimation.

Memory Subsystem Efficiency

Because the CPU and GPU share the LPDDR5 memory pool, CPU-side data processing that runs concurrently with GPU inference competes for bandwidth. Pinning CPU inference pre-processing to specific cores and using CUDA streams to overlap data transfer with compute reduces memory bus contention and lowers total system power at equivalent throughput.

Decision Framework

Measurements in this article were taken at 25°C ambient using calibrated bench power supplies, with workloads run at batch size 1 across FP32 and INT8 precision. Comparisons across platforms are normalized to equivalent task throughput to avoid misleading raw-power comparisons between platforms with different performance levels.

Use the following criteria to determine whether the Orin Nano fits a given deployment:

• Battery runtime > 2 hours required: Target ≤7W average system draw. Use INT8 quantization, selective inference gating, and a ≥20 Wh battery. Verify with load testing before field deployment.
• Sustained throughput at >15W: Mandate active cooling. Passive heatsinks will throttle within minutes under sustained GPU load in enclosures with limited airflow. Consider NVMe vs SD Card for Jetson when planning storage I/O under thermal constraints.
• Replacing a legacy Jetson Nano: Orin Nano delivers 2–3× the inference throughput at comparable or lower power. Model re-compilation with TensorRT is required; weights are not drop-in compatible.
• Workload exceeds 15W sustained: Evaluate Jetson Orin NX, Hailo-8, or Coral TPU. The Orin Nano's TDP ceiling limits multi-stream or large-model scenarios where higher power budget translates to proportionally higher throughput.

Conclusion

Jetson Orin Nano power consumption is well-characterized and predictable: 5W idle, 8–12W for typical single-stream inference, up to 25W under maximum sustained GPU load. The 15W TDP is the practical ceiling for most production workloads. For battery deployments, INT8 quantization and inference gating are the highest-leverage optimizations. For sustained high-throughput tasks, active cooling is not optional. If your workload comfortably fits within 15W, the Orin Nano offers a better performance-per-watt ratio than any previous Jetson module in its power class.